PMC-FPGA05 Development Kit User Programmable Virtex-5 LX110 PCI board with plug-in I/O Adapter Modules

The PMC-FPGA05 Development Kit is a Xilinx® Virtex™-5 XC5VLX110 platform FPGA based, short PCI card with high speed digital I/O and PCI-X interface to the host computer. The PMC-FPGA05 Development Kit is aimed at application development.

Xilinx Virtex-5 FPGA
The new generation of platform FPGA supports logic gates with hard-wired functionality, including high-speed serial communications and DSP multipliers, making them ideal for a wide range of reconfigurable computing applications. The PMC-FPGA05 Development Kit enhances the processing power and flexibility of the Virtex-5 XC5VLX110 FPGA with large, independent pools of memory, a wide range of I/O possibilities and a comprehensive board support package.

Digital I/O
There are 138 single-ended I/O lines routed to a 180-way connector near the front panel. These lines are routed so that they may be used as single-ended signals or differential pairs. The FPGA I/O signals are banked, with two banks being used at the front panel connector. Each bank is independently configurable to 2.5V or 3.3V signaling. Developers can create custom I/O modules that utilize these I/O lines using the specifications set out in our documentation that comes with the development card. Another bank of 64 single-ended lines (32 differential pairs) connects to User I/O at the rear of the board, for slower digital communications.

Memory
3 banks of 4Mb x 18 (9 Mbytes per bank)* QDR II SRAM support DSP functions in the Virtex-5 and are independently connected directly to the FPGA, providing great flexibility in how they are used. The SRAM is clocked at 200MHz, providing simultaneous read and write operations each at 800Mbytes/s. Two independent banks of 64Mbytes x 16 (128 Mbytes per bank) DDR2 SDRAM are directly connected to the FPGA. Clocked at 200MHz, each bank can be used independently (e.g. filling one memory while emptying data from the other at 800Mbytes/s) or as a single 32-bit wide, 1600Mbytes/s memory structure. This memory provides a large pool of memory to buffer DMA transfers and other large data block operations.

Flash
The Virtex-5 FPGA is configured from a 256Mbit (32Mbytes) on-board FLASH. A default configuration image, with a PCI-X interface and Flash programming interface, is preloaded into the FLASH along with a recovery image. The FLASH is programmable through the PCI/PCI-X bus. Three or more Virtex-5 configurations can be held in the FLASH. The image used to configure the FPGA is selected by switch.

Software
A complete software development bundle for the PMC-FPGA05 Development Kit is available, for the Windows XP operating system, that includes:
VHDL library code blocks (demonstrating how board resources can be used)
Windows XP drivers
API with C support libraries
Example code
FLASH programming and board debug utilities
Hardware and software manuals

Development of VHDL code for the FPGA requires synthesis tools such as Xilinx ISE Foundation.

* 8 Mbytes per bank if 16-bit words are used.