PowerPC CPU
|
Device
|
Freescale Power Architecture MPC8641D
|
Speed
|
1.25GHz
|
Memory
|
2Gbyte DDR2 SDRAM (inc. ECC)
|
| FLASH |
128Mbytes
|
| FPGA Nodes |
| Device |
Xilinx Virtex-5 LX110T or 95SXT (speed grade 2) |
| Number of FPGAs |
2 |
| Memory (per FPGA) |
4x 9MB QDR-II SRAM
(18-bit data paths at up to 250MHz)
2x 128MB DDR2 SDRAM
(16-bit data paths at up to 266MHz)
32MB FLASH (for storing FPGA images only) |
| Connectivity |
x8 PCIe to CPU (per FPGA)
4x RocketIO between FPGAs
4x RocketIO per FPGA for VXS
40 signals between FPGAs (single-ended)
VME P2 (user defined I/O - 64 signals) |
| Clock References |
3 sources, 156.25, 125 and 106.25MHz |
| Configuration |
JTAG, MPC8641D and on-board FLASH |
| Ethernet |
|
| Device |
Embedded within MPC8641D |
| Speed |
10/100/1000Mbps |
| Channel A |
1000-SX (front panel optical) or
10/100-TX, 1000-T via VME P2
auto select
|
| Channel B |
1000-SX (front panel optical) or
10/100-TX, 1000-T (front panel RJ45)
Note: this is defined as a build option
|
| Serial I/O |
| Device |
DUART embedded within MPC8641D |
| Channels |
2x RS232 (routed to VME P2) |
| PCIe |
|
| Device |
PEX8532 |
| Connectivity |
FPGA B (x8)
MPC8641D (x8)
XMC (x8)
PCIe/PCI-X bridge (x4) |
| VME |
|
| Device |
Tundra Tsi148 |
| Compliance |
2eSST, VME64, master/slave |
| VXS |
|
| Compliance |
VITA 41.0, payload |
| Protocol |
FPGA defined |
| PMC/XMC Site |
|
| PCI Compliance |
PCI (33/66MHz)
PCI-X (66/100/133MHz)
3.3V signalling |
| XMC (VITA 42) |
P15 x8 PCIe channel |
| Software/HDL Code |
| Operating System |
VxWorks 6.5, Linux 2.6 (DENX Distribution) |
| Utilities |
FLASH programming, diagnostics |
| Software/HDL Examples |
Examples (memory, PCIe, VXS)
FusionXF FPGA Design Kit |
| Misc. |
|
| Power |
VXS/VME64x
3.3V (TBA W)
5V (TBA W)
+12V (TBA W)
-12V (TBA W)
|