TS-CP1 Dual ADSP-TS101 / FPGA 6U cPCI Card

The TS-CP1 is a 6U cPCI* card featuring two similar processing tiles: each tile includes a ADSP-TS101 TigerSHARC DSP and a Xilinx Virtex-II XC2V8000 FPGA co-processor with high-speed digital I/O port. The TS-CP1 is a reconfigurable computing platform ideal for intense signal processing applications with very high data throughput requirements such as radar, sonar, imaging, electronic surveillance, software radio and telecommunications.

TigerSHARC DSP
The TigerSHARC DSP has dedicated inter-DSP communications known as link ports. Each TigerSHARC DSP has four such links and each DSP on the TS-CP1 connects two links between DSPs (i.e. between tiles) and two to the FPGA in the processing tile. The local bus connection gives the TigerSHARC access to all the other resources, such as SDRAM.

Virtex-II FPGA
For each processing tile, a Xilinx XC2V8000-5 Virtex-II FPGA is available for both co-processing and for user I/O.

The FPGA has direct access to 6 banks of 2Mx18 quad data rate (QDR-II) SRAM - ideal for storage of intermediate data created by algorithms - and access to all the other tile resources via the 75MHz local bus.
I/O

Each tile is connected to the secondary PCI bus via its own Quicklogic bridge chip. A HiNT HB6 transparent bridge connects the secondary PCI bus to the host PCI bus.

The FPGAs together provide 238 user FPGA I/O lines. Dependent on the backplane user I/O interface used, these single-ended signals can be used as LVDS, LVTTL etc.


* based on 6U CompactPCI